Committee on Global Approaches to Advanced Computing
The National Academies
Dr. Daniel A. Reed (Chair)
Dan Reed is Microsoft’s Corporate Vice President for Technology Strategy and Policy and Extreme Computing. Previously, he was the Chancellor’s Eminent Professor at UNC Chapel Hill, as well as the Director of the Renaissance Computing Institute (RENCI) and the Chancellor’s Senior Advisor for Strategy and Innovation for UNC Chapel Hill.
Dr. Reed has served as a member of the U.S. President’s Council of Advisors on Science and Technology (PCAST) and as a member of the President’s Information Technology Advisory Committee (PITAC). As chair of PITAC’s computational science subcommittee, he was lead author of the report “Computational Science: Ensuring America’s Competitiveness.” On PCAST, he co-chaired the Networking and Information Technology subcommittee (with George Scalise of the Semiconductor Industry Association) and co-authored a report on the National Coordination Office’s Networking and Information Technology Research and Development (NITRD) program called “Leadership Under Challenge: Information Technology R&D in Competitive World.” In June 2009, he completed two terms of service as chair of the board of directors of the Computing Research Association, which represents the research interests of Ph.D. granting university departments, industrial research groups and national laboratories.
He was previously Head of the Department of Computer Science at the University of Illinois at Urbana-Champaign (UIUC), where the held the Edward William and Jane Marr Gutgsell Professorship. He has also been Director of the National Center for Supercomputing Applications (NCSA) at UIUC, where he also led National Computational Science Alliance, a fifty-institution partnership devoted to creating the next generation of computational science tools. He was also one of the principal investigators and chief architect for the NSF TeraGrid. He received his B.S. from Missouri University of Science and Technology and his M.S. and Ph.D. in computer science in 1983 from Purdue University. He is a Fellow of the ACM, the IEEE and the AAAS.
Dr. Cong Cao
University of Nottingham
Dr. Cong Cao is Associate Professor and Reader at the School of Contemporary Chinese Studies, University of Nottingham. Previously, he was a senior research associate with the Neil D. Levin Graduate Institute of International Relations and Commerce, the State University of New York where he also coordinates Levin's Global Talent Index project. He received his PhD in sociology from Columbia University in 1997 and has worked at the University of Oregon and the National University of Singapore.
As one of the leading scholars in the studies of China's science, technology, and innovation, Dr. Cao is the author of China's Scientific Elite (London and New York: RoutledgeCurzon, 2004), a study of those Chinese scientists holding the elite membership in the Chinese Academy of Sciences, and China's Emerging Technological Edge: Assessing the Role of High-End Talent (with Denis Fred Simon, Cambridge and New York: Cambridge University Press, 2009), the first in forty years to address these critical issues surrounding the quality, quantity, and effective utilization of China's human resources in science and technology. Most recently, Dr. Cao has embarked on a project examining China's biotechnology policy and participated in a study of the development of nanotechnology in China, both supported by the U.S. National Science Foundation.
His areas of expertise include: science, technology, and innovation policy; global talent and talent migration; technological entrepreneurship; sociology of science/social studies of science and technology; China studies; media studies; social science research methods.
Dr. Tai M. Cheung
University of California, San Diego
Tai Ming Cheung is an associate research scientist at the University of California Institute on Global Conflict and Cooperation (IGCC) located at the University of California, San Diego in La Jolla. He directs the Minerva program on Chinese security and technology, a multi-year academic research and training project funded by the U.S. Defense Department to explore China’s technological potential. His responsibilities include managing the institute's track two program, the Northeast Asia Cooperation Dialogue, which brings together senior foreign ministry and defense officials as well as academics from the United States, China, Japan, South Korea, North Korea, and Russia for informed discussions on regional security issues.
Dr. Cheung is also an associate adjunct professor at UCSD’s Graduate School of International Relations and Pacific Studies (IRPS) where he teaches courses on Asian security, Chinese security and technology, and Chinese politics.
Dr. Cheung is a long-time analyst of Chinese and East Asian defense and national security affairs, especially defense economic, industrial and science and technological issues. His latest book, Fortifying China: The Struggle to Build a Modern Defense Economy, was published by Cornell University Press in 2009. The book examines the economic, commercial and technological foundations of China’s long-term defense modernization that examines the development of the defense industrial complex, the role and prospects for civilian-military integration, and the military dimensions of science and technology policies. He was based in Northeast Asia (Hong Kong, China, and Japan) from the mid-1980s to 2002 covering political, economic, and strategic developments in Greater China and East Asia as a journalist for the Far Eastern Economic Review from 1988-1993 and subsequently as a political and business risk consultant for a number of companies, including PricewaterhouseCoopers.
Dr. Cheung received his Ph.D. in War Studies from King's College London in 2007.
Mr. John H. Crawford
John Crawford is an Intel Fellow, Digital Enterprise Group, and sets the architectural direction for emerging power and reliability technologies for future Intel® Processor Server platforms.When Crawford joined Intel as a new college graduate in 1977, he worked as a software engineer developing software tools for Intel's 8086 processor; including the code generation phase of Intel's Pascal compiler for the 8086. In 1982, he became the Chief Architect for the Intel386™ microprocessor. He was responsible for defining the company's 32-bit architectural extensions to the already successful 8086/186/286 16-bit product line. In this capacity, he set the architectural direction and later participated in the design of the processor by leading the microprogram development and test program generation. Crawford made similar contributions as Chief Architect of the Intel486™ processor. Crawford co-managed the design of the Pentium® processor up through a successful product launch in 1993. Crawford headed the joint Architecture Research with Hewlett-Packard that developed the Itanium family architecture, Intel's 64-bit Enterprise product line. He has been involved with the Itanium family of products since its inception in 1994. In 1995, Crawford received the ACM/IEEE Eckert-Mauchly Award for contributions to computer and digital systems architecture. Crawford received the IEEE Ernst Weber Engineering Leadership Recognition in June 1997. He was elected to the National Academy of Engineering in 2002.
Crawford received a bachelor's degree in Computer Science from Brown University in 1975, and a master's degree in Computer Science from the University of North Carolina, Chapel Hill, in 1977. Crawford holds 23 patents.
Dr. Dieter Ernst
Dieter Ernst is a senior East-West Center fellow (at the full professional level). Dr. Ernst is a former senior advisor to the Organization for Economic Cooperation and Development (OECD), Paris; a former research director of the Berkeley Roundtable on the International Economy (BRIE), University of California at Berkeley, and a former professor of international business at the Copenhagen Business School. Dr. Ernst has co-chaired an advisory committee of the US Social Science Research Council to develop a new program on Innovation, Business
Institutions and Governance in Asia. He has also served as scientific advisor to several institutions, among them the Organization of Economic Cooperation and Development, the World Bank, the National Bureau for Asian Research, the U.N. Conference on Trade and Development, and the U.N. Industrial Development Organization. He holds a Ph.D. in economics from the University Bremen.
His recent books include Indigenous Innovation and Globalization: The Challenge for China's Standardization Strategy (2011), China's Innovation Policy Is a Wake-up Call for America (2011), A New Geography of Knowledge in the Electronics Industry? Asia's Role in Global Innovation Networks (2009), Innovation Offshoring - Asia's Emerging Role in Global Innovation Networks (2006), International Production Networks in Asia: Rivalry or Riches? (2000), and Technological Capabilities and Export Success-Lessons from East Asia (1998).
Dr. Mark D. Hill
University of Wisconsin-Madison
Mark Hill is a Professor of Computer Science and Electrical and Computer Engineering at the University of Wisconsin-Madison. Mark D. Hill is Professor in both the Computer Sciences Department and the Electrical and Computer Engineering Department at the University of Wisconsin-Madison.
Dr. Hill's research targets computer design and evaluation. He has made contributions to parallel computer system design (e.g., memory consistency models and cache coherence), memory system design (caches and translation buffers), computer simulation (parallel systems and memory systems), software (e.g., page tables and cache-conscious optimizations for databases and pointer-based codes) and recently transactional memory. For example, he is the inventor of the widely-used 3C model of cache behavior (compulsory, capacity, and conflict misses).
Hill's current research is mostly part of the Wisconsin Multifacet Project that seeks to improve the multiprocessor servers that form the computational infrastructure for Internet web servers, databases, and other demanding applications. The Multifacet work focuses on using the transistor bounty provided by Moore's Law to improve multiprocessor performance, cost, and fault tolerance, while also making these systems easier to design and program.
Hill was named an ACM Fellow (2004) for contributions to memory consistency models and memory system design, elevated to a Fellow of the IEEE (2000) for contributions to cache memory design and analysis, and was awarded the ACM SIGARCH Distinguished Service Award in 2009. He was won three important University of Wisconsin awards: Kellett in 2010 (3rd winner from CS), Vilas Associate in 2006, and Romnes Fellow in 1997. He co-edited Readings in Computer Architecture in 2000, is co-inventor of over 30 United States patents (several of which have been co-issued in the European Union & Japan), was an ACM SIGARCH Director (1993-2007), and won an NSF Presidential Young Investigator award in 1989. He is co-author of five papers selected by IEEE Micro Top Picks (from 2003, 2004, 2006, 2007a, & 2007b) and co-won the best paper award in VLDB 2001. He has held visiting positions at Columbia University (2010), Universidad Politecnica de Catalunya (2002-03) and Sun Microsystems (1995-96). Dr. Hill earned a Ph.D. in Computer Science from the University of California - Berkeley in 1987, an M.S. in Computer Science from Berkeley in 1983, and a B.S.E. in Computer Engineering from the University of Michigan - Ann Arbor in 1981.
Dr. Stephen W. Keckler
The University of Texas at Austin; NVIDIA
Stephen Keckler is the Director of Architecture Research at NVIDIA. Steve Keckler joined NVIDIA in December 2009 and leads the Architecture Research Group. He is also Professor of both Computer Science and Electrical and Computer Engineering at the University of Texas at Austin, where he has served on the faculty since 1998. His research team at UT-Austin developed scalable parallel processor and memory system architectures, including non-uniform cache architectures; explicit data graph execution processors, which merge dataflow execution with sequential memory semantics; and micro-interconnection networks to implement distributed processor protocols. All of these technologies were demonstrated in the TRIPS experimental computer system.
Keckler was previously at the Massachusetts Institute of Technology from 1990 to 1998, where he led the
development of the M-Machine experimental parallel computer system. He is a Fellow of the IEEE, an Alfred P. Sloan Research Fellow, and a recipient of the NSF CAREER award, the ACM Grace Murray Hopper award, the President's Associates Teaching Excellence Award at UT-Austin, and the Edith and Peter O’Donnell award for Engineering. He earned a BS in Electrical Engineering from Stanford University and an MS and a Ph.D. in Computer Science from the Massachusetts Institute of Technology.
Dr. David E. Liddle
U.S. Venture Partners
David Liddle is a Venture Partner at the US Venture Partners. Since 2000, Dr. Liddle has been a partner at U.S. Venture Partners, a Silicon Valley-based venture capital firm. He co-founded and between 1992 and 1999, he served as president and CEO of Interval Research Corporation, a Silicon Valley-based laboratory and incubator for new businesses focusing on broadband, consumer devices, interaction design and advanced technologies.
Prior to co-founding Interval with Paul Allen, David founded Metaphor which was acquired by IBM in 1991, which named him Vice President of Business development for IBM Personal Systems. David's extensive experience in research and development has focused largely on human-computer interactions and includes 10 years at Xerox Palo Alto Research Center (PARC), from 1972 to 1982. He has been a director of Sybase, Broderbund Software, Borland International and Ticketmaster, and is currently on the board of the New York Times Company. His board involvement at USVP includes Electric Cloud, Instantis, Klocwork, MaxLinear, and Optichron. David has served on the DARPA Information Science and Technology Committee, and as chair of the NAS Computer Science and Telecommunications board.
David earned a B.S. in Electrical Engineering at the University of Michigan and a Ph.D. in EECS at the University of Toledo, where his dissertation focused on reconfigurable computing machines and theories of encryption, encoding and signal recovery. His contributions to human-computer interaction design earned him the distinction of Senior Fellow at the Royal College of Art.
Dr. Kathryn S. McKinley
The University of Texas at Austin
Kathryn McKinley is the Professor of Computer Science at the University of Texas at Austin. Professor McKinley holds an Endowed Professorship in the Department of Computer Science at The University of Texas at Austin. She received her Ph.D. from Rice University working with Ken Kennedy. Her research interests include compilers, memory management, runtime systems, programming languages, security, reliability, and architecture. She and her collaborators have produced tools based on their research that are in wide research and industrial use: the DaCapo Java Benchmarks, TRIPS Compiler, Hoard memory manager, MMTk garbage collector toolkit, and the Immix mark-region garbage collector. McKinley has graduated fourteen PhD students and is currently supervising four. Her service includes program chair for ASPLOS '04, PACT '05, and PLDI '07; co-Editor-in-Chief of ACM Transactions on Programming Language Systems (TOPLAS) (2007-2010); and CRA-W board member (2009-present). McKinley received an NSF CAREER award, IBM Faculty awards, outreach awards, and best paper awards. She is an IEEE Fellow and an ACM Fellow.